Peter Hofstee
Peter Hofstee | |
|---|---|
 Peter Hofstee (October 2014) | |
| Born | 1962 Groningen, Netherlands |
| Nationality | Dutch |
| Alma mater | University of Groningen Caltech |
| Scientific career | |
| Thesis | Synchronizing processes (1995) |
| Doctoral advisor | Jan L. A. van de Snepscheut K. Mani Chandy |
Harm Peter Hofstee (born 1962) is a Dutch physicist and computer scientist who currently is a distinguished research staff member at IBM Austin, USA, and a part-time professor in Big Data Systems at Delft University of Technology, Netherlands.
Heterogeneous computing
[edit]Hofstee is best known for his contributions to Heterogeneous computing as the chief architect of the Synergistic Processor Elements in the Cell Broadband Engine processor used in the Sony PlayStation 3,[1][2] and the first supercomputer to reach sustained Petaflop operation. After returning to IBM research in 2011 he has focused on optimizing the system roadmap for big data, analytics, and cloud, including the use of accelerated compute. His early research work on coherently attached reconfigurable acceleration on POWER7 paved the way for the new Coherent Accelerator Processor Interface on POWER8.[3] Hofstee is an IBM Master Inventor with more than 100 issued patents.[4]
Background
[edit]Hofstee was born in Groningen and obtained his master's degree in theoretical physics of the University of Groningen in 1988. He continued to study at the California Institute of Technology where he wrote a master's thesis Constructing Some Distributed Programs in 1991[5] and obtained a Ph.D. with a thesis titled Synchronizing Processes in 1995.[6] He joined Caltech as a lecturer for two years and moved to IBM in the Austin, Texas Research Laboratory, where he had staff member, senior technical staff member and distinguished engineer positions.
Previous Positions
[edit]- 1994 - 1996
- Lecturer (Member of the Faculty) at California Institute of Technology, Computer Science Department
- 1996 - 2001
- Research Staff Member at IBM Austin Research Laboratory
- 2001 - 2006
- Senior Technical Staff Member, Cell SPE Chief Architect at IBM Microelectronics Division / IBM Systems and Technology Group
- 2006 - 2010
- Distinguished Engineer, Cell/B.E. Chief Scientist at IBM Systems and Technology Group
Current positions
[edit]- 2010–Present
- Distinguished Research Staff Member, Workload-Optimized and Hybrid Systems at IBM Austin Research Laboratory
- 2014–Present (part-time)
- Professor, Big Data Systems at Delft University of Technology, the Netherlands
Since 2011, Peter is leading the Big Data system design work at IBM. In March 2016, Peter was appointed as professor to the chair of Big Data Computer Systems at the Faculty of Electrical Engineering, Mathematics and Computer Science at Delft University of Technology.
Awards
[edit]- IBM Corporate Award
- For Cell Broadband Engine, 2006
- IBM Research Division Group Award
- For Zebra/Ivy Grant Program Initiation, Jan. 2004 ( precursor to Roadrunner )
- IBM Outstanding Technical Achievement Award
- In appreciation for the world's first 1-GHz PowerPC Microprocessor, Feb. 1998
- 20th Annual Award for Excellence in Teaching,
- The Associated Students of the California Institute of Technology, 1995-96
- Two IBM Graduate Fellowships (while at California Institute of Technology)
- 1991-1993
Memberships/Honors
[edit]- IBM Master Inventor
- Member, IBM Academy of Technology
- Member of the Institute of Electrical and Electronics Engineers and Association for Computing Machinery
References
[edit]- ^ David Becker (December 3, 2004). "PlayStation 3 chip goes easy on developers". CNET. Retrieved January 13, 2019.
- ^ Scarpino, M. (2008). Programming the cell processor: for games, graphics, and computation. Pearson Education.
- ^ "IBM Research Blog: Making Power Open to the Enterprising Masses". IBM. May 15, 2014. Retrieved January 13, 2019.
- ^ JUSTIA Patents, Patents by Inventor Harm Peter Hofstee
- ^ Master Thesis PDF: Constructing Some Distributed Programs
- ^ PhD Thesis PDF: Synchronizing Processes
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